uart vc: use an enumerated type for parity

Author: rafaelnp

examples/vhdl/uart/src/test/tb_uart_rx.vhd

@@ -35,7 +35,8 @@ architecture tb of tb_uart_rx is
   signal num_overflows : integer := 0;
 
   constant uart_bfm : uart_master_t := new_uart_master(initial_baud_rate => baud_rate,
-                                                       initial_parity => parity);
+                                                     initial_parity => int_to_parity(parity));
+
   constant uart_stream : stream_master_t := as_stream(uart_bfm);
 
   constant axi_stream_bfm : axi_stream_slave_t := new_axi_stream_slave(data_length => tdata'length);

examples/vhdl/uart/src/test/tb_uart_tx.vhd

@@ -36,7 +36,7 @@ architecture tb of tb_uart_tx is
 
   shared variable rnd_stimuli, rnd_expected : RandomPType;
   constant uart_bfm : uart_slave_t := new_uart_slave(initial_baud_rate => baud_rate,
-                                                     initial_parity => parity,
+                                                     initial_parity => int_to_parity(parity),
                                                      data_length => tdata'length);
   constant uart_stream : stream_slave_t := as_stream(uart_bfm);
 

vunit/vhdl/com/src/com_types.vhd

@@ -48,6 +48,11 @@ package com_types_pkg is
                         duplicate_actor_name_error,
                         new_actor_from_root_id_error);
 
+  type parity_t is (
+    PARITY_NONE,
+    PARITY_ODD,
+    PARITY_EVEN);
+
   subtype com_error_t is com_status_t range timeout to new_actor_from_root_id_error;
 
   -- All fields of the actor type are private
@@ -406,6 +411,9 @@ package com_types_pkg is
 
   -- Private
   impure function is_valid(code : integer) return boolean;
+
+  function int_to_parity(value : integer) return parity_t;
+
 end package;
 
 package body com_types_pkg is
@@ -889,4 +897,18 @@ package body com_types_pkg is
     return (p_id_number => value);
   end;
 
+  function int_to_parity(value: integer) return parity_t is
+  begin
+      case value is
+        when 0 =>
+          return PARITY_NONE;
+        when 1 =>
+          return PARITY_ODD;
+        when 2 =>
+          return PARITY_EVEN;
+        when others =>
+          return PARITY_NONE;
+      end case;
+  end function int_to_parity;
+
 end package body com_types_pkg;

vunit/vhdl/verification_components/src/uart_master.vhd

@@ -31,7 +31,7 @@ begin
     procedure uart_send(data : std_logic_vector;
                         signal tx : out std_logic;
                         baud_rate  : integer;
-                        parity     : natural
+                        parity     : parity_t
   ) is
       constant time_per_bit : time := (10**9 / baud_rate) * 1 ns;
 
@@ -48,9 +48,9 @@ begin
         send_bit(data(i));
       end loop;
 
-      if parity = 1 then
+      if parity = PARITY_ODD then
         send_bit(odd_parity(data));
-      elsif parity = 2 then
+      elsif parity = PARITY_EVEN then
         send_bit(even_parity(data));
       end if;
 
@@ -59,7 +59,7 @@ begin
 
     variable msg : msg_t;
     variable baud_rate : natural := uart.p_baud_rate;
-    variable parity    : natural := uart.p_parity;
+    variable parity    : parity_t := uart.p_parity;
     variable msg_type : msg_type_t;
   begin
     receive(net, uart.p_actor, msg);
@@ -72,7 +72,7 @@ begin
     elsif msg_type = uart_set_baud_rate_msg then
       baud_rate := pop(msg);
     elsif msg_type = uart_set_parity_msg then
-      parity := pop(msg);
+      parity := int_to_parity(pop(msg));
     else
       unexpected_msg_type(msg_type);
     end if;

vunit/vhdl/verification_components/src/uart_pkg.vhd

@@ -18,14 +18,14 @@ package uart_pkg is
   type uart_master_t is record
     p_actor : actor_t;
     p_baud_rate : natural;
-    p_parity     : natural;
+    p_parity     : parity_t;
     p_idle_state : std_logic;
   end record uart_master_t;
 
   type uart_slave_t is record
     p_actor : actor_t;
     p_baud_rate : natural;
-    p_parity     : natural;
+    p_parity     : parity_t;
     p_idle_state : std_logic;
     p_data_length : positive;
   end record;
@@ -42,22 +42,22 @@ package uart_pkg is
   -- 0 = no parity, 1 = odd parity, 2 = even parity
   procedure set_parity(signal net  : inout network_t;
                        uart_master : uart_master_t;
-                       parity      : natural);
+                       parity      : parity_t);
 
   procedure set_parity(signal net : inout network_t;
                        uart_slave : uart_slave_t;
-                       parity     : natural);
+                       parity     : parity_t);
 
   constant default_baud_rate : natural := 115200;
   constant default_idle_state : std_logic := '1';
   constant default_data_length : positive := 8;
-  constant default_parity      : natural  := 0;
+  constant default_parity      : parity_t := PARITY_NONE;
 
   impure function new_uart_master(initial_baud_rate : natural := default_baud_rate;
-                                  initial_parity : natural := default_parity;
+                                  initial_parity : parity_t := default_parity;
                                   idle_state : std_logic := default_idle_state) return uart_master_t;
   impure function new_uart_slave(initial_baud_rate : natural := default_baud_rate;
-                                 initial_parity : natural := default_parity;
+                                 initial_parity : parity_t := default_parity;
                                  idle_state : std_logic := default_idle_state;
                                  data_length : positive := default_data_length) return uart_slave_t;
 
@@ -68,7 +68,7 @@ package uart_pkg is
 
   constant uart_set_baud_rate_msg : msg_type_t := new_msg_type("uart set baud rate");
 
-  constant uart_set_parity_msg : msg_type_t := new_msg_type("uart set parity rate");
+  constant uart_set_parity_msg : msg_type_t := new_msg_type("uart set parity");
 
   function even_parity(data : std_logic_vector) return std_logic;
   function odd_parity (data : std_logic_vector) return std_logic;
@@ -78,7 +78,7 @@ end package;
 package body uart_pkg is
 
   impure function new_uart_master(initial_baud_rate : natural := default_baud_rate;
-                                  initial_parity : natural := default_parity;
+                                  initial_parity : parity_t := default_parity;
                                   idle_state : std_logic := default_idle_state) return uart_master_t is
   begin
     return (p_actor => new_actor,
@@ -89,7 +89,7 @@ package body uart_pkg is
 
   impure function new_uart_slave(
                                  initial_baud_rate : natural := default_baud_rate;
-                                 initial_parity : natural := default_parity;
+                                 initial_parity : parity_t := default_parity;
                                  idle_state : std_logic := default_idle_state;
                                  data_length : positive := default_data_length
   ) return uart_slave_t is
@@ -147,28 +147,24 @@ package body uart_pkg is
 
   procedure set_parity(signal net : inout network_t;
                        actor      : actor_t;
-                       parity     : natural) is
+                       parity     : parity_t) is
     variable msg : msg_t := new_msg(uart_set_parity_msg);
   begin
-    if parity > 2 then
-      report "Invalid parity value: " & to_string(parity)
-      severity error;
-    end if;
 
-    push(msg, parity);
+    push(msg, parity_t'pos(parity));
     send(net, actor, msg);
   end;
 
   procedure set_parity(signal net  : inout network_t;
                        uart_master : uart_master_t;
-                       parity      : natural) is
+                       parity      : parity_t) is
   begin
     set_parity(net, uart_master.p_actor, parity);
   end;
 
   procedure set_parity(signal net : inout network_t;
                        uart_slave : uart_slave_t;
-                       parity     : natural) is
+                       parity     : parity_t) is
   begin
     set_parity(net, uart_slave.p_actor, parity);
   end;

vunit/vhdl/verification_components/src/uart_slave.vhd

@@ -24,7 +24,7 @@ end entity;
 
 architecture a of uart_slave is
   signal baud_rate : natural := uart.p_baud_rate;
-  signal parity    : natural := uart.p_parity;
+  signal parity    : parity_t := uart.p_parity;
   signal local_event : std_logic := '0';
   constant data_queue : queue_t := new_queue;
 begin
@@ -39,7 +39,7 @@ begin
     if msg_type = uart_set_baud_rate_msg then
       baud_rate <= pop(msg);
     elsif msg_type = uart_set_parity_msg then
-      parity <= pop(msg);
+      parity <= int_to_parity(pop(msg));
     elsif msg_type = stream_pop_msg then
       reply_msg := new_msg;
       if not (length(data_queue) > 0) then
@@ -59,7 +59,7 @@ begin
     procedure uart_recv(variable data : out std_logic_vector;
                         signal rx : in std_logic;
                         baud_rate : integer;
-                        parity    : natural) is
+                        parity    : parity_t) is
       constant time_per_bit : time := (10**9 / baud_rate) * 1 ns;
       constant time_per_half_bit : time := (10**9 / (2*baud_rate)) * 1 ns;
       variable parity_bit  : std_logic;
@@ -74,7 +74,7 @@ begin
         wait for time_per_bit;
       end loop;
 
-      if parity = 1 then
+      if parity = PARITY_ODD then
         parity_bit := rx;
         parity_calc := odd_parity(data);
         wait for 0 ns;
@@ -85,7 +85,7 @@ begin
         end if;
 
         wait for time_per_bit;
-      elsif parity = 2 then
+      elsif parity = PARITY_EVEN then
         parity_bit := rx;
         parity_calc := even_parity(data);
         wait for 0 ns;

vunit/vhdl/verification_components/test/tb_uart.vhd

@@ -90,8 +90,8 @@ begin
       test_baud_rate(7000);
       test_baud_rate(200000);
     elsif run("test_parity_odd") then
-      set_parity(net, master_uart_p, 1);
-      set_parity(net, slave_uart_p, 1);
+      set_parity(net, master_uart_p, PARITY_ODD);
+      set_parity(net, slave_uart_p, PARITY_ODD);
 
       for i in 0 to 7 loop
         push_stream(net, master_stream_p,
@@ -101,8 +101,8 @@ begin
       end loop;
 
     elsif run("test_parity_even") then
-      set_parity(net, master_uart_p, 2);
-      set_parity(net, slave_uart_p, 2);
+      set_parity(net, master_uart_p, PARITY_EVEN);
+      set_parity(net, slave_uart_p, PARITY_EVEN);
 
       for i in 0 to 7 loop
         push_stream(net, master_stream_p,