fwk/lilac: PD - support crossbar ready on port evt

On CCG8 3.7.0 SDK, you can only send HPI events to a port, so handle the
CCG_RESPONSE_AMD_CROSSBAR_READY event on the port interrupt as well as
the device interrupt.

BRANCH=fwk-lilac-27116
BUG=https://app.clickup.com/t/86eqarxyq
https://app.clickup.com/t/86eqtwjgj
TEST=Boot system with devices attached to either side.
Check in the log that the PD event 0x38 is recieved and the EC triggers
error recovery on ports:
[9.571500 AMD Crossbar is ready C:0 ,P:1]
[11.764500 AMD Crossbar is ready C:1 ,P:2]
[11.776500 TYPE_C_ERROR_RECOVERY]
[11.791500 TYPE_C_ERROR_RECOVERY]

Signed-off-by: Kieran Levin <ktl@frame.work>

Author: kiram9

zephyr/program/framework/src/cypress_pd_common.c

@@ -2116,6 +2116,19 @@ void cypd_port_int(int controller, int port)
 		cypd_handle_alert_msg(controller, port, response_len);
 		CPRINTS("CCG_RESPONSE_ALERT_RX");
 		break;
+#ifdef CONFIG_CHIPSET_AMD
+	case CCG_RESPONSE_AMD_CROSSBAR_READY:
+		/**
+		 * Vendor requests EC to do the error recovery after
+		 * AMD Crossbar is ready.
+		 *
+		 * They add the specific response code 0x38 to notify EC
+		 * and then EC performs the typec error recovery
+		 */
+		CPRINTS("AMD Crossbar is ready");
+		perform_error_recovery(controller);
+		break;
+#endif
 	case CCG_RESPONSE_VDM_RX:
 		i2c_read_offset16_block(i2c_port, addr_flags,
 			CCG_READ_DATA_MEMORY_REG(port, 0), data2, MIN(response_len, 32));