fwk: perform the typec error recovery after AMD Crossbar is ready

The description in AMD USB Power Delivery I2C Target Programming
Guide for APU Gen2.3 capture 2. It is necessary for the SoC to
perform further iniitialization steps before the Crossbar is ready
to accept commands.

PD chip vendor add the specific response code 0x38 for Crossbar is
ready. When EC receives this response code, EC needs to perform the
typec error recovery to solve the device loss issue.

BRANCH=lilac
BUG=https://app.clickup.com/t/86eqgujm1
TEST=resume from shutdown, the device does not loss
TEST=resume from hibernate, the device does not loss

Signed-off-by: Josh Tsai <Josh_Tsai@compal.com>
(cherry picked from commit 5166ac9)

pr lilac: PD - enable platform events

This is to allow us to get APU setup events from the PD.

Signed-off-by: Kieran Levin <ktl@frame.work>

Author: Josh-Tsai

zephyr/program/framework/src/cypd_ccg8.c

@@ -144,8 +144,8 @@ int cypd_setup(int controller)
 		int status_reg;
 	} const cypd_setup_cmds[] = {
 		/* Set the port event mask */
-		{ CCG_EVENT_MASK_REG(0), 0x27ffff, 4, CCG_PORT0_INTR},
-		{ CCG_EVENT_MASK_REG(1), 0x27ffff, 4, CCG_PORT1_INTR },
+		{ CCG_EVENT_MASK_REG(0), 0x2fffff, 4, CCG_PORT0_INTR},
+		{ CCG_EVENT_MASK_REG(1), 0x2fffff, 4, CCG_PORT1_INTR },
 	};
 	BUILD_ASSERT(ARRAY_SIZE(cypd_setup_cmds) == CYPD_SETUP_CMDS_LEN);