Hikey960 upstream rebase

[devfchen]

From d7fe9d203c0408d1f2e137ac22e1883f597fafc1 Mon Sep 17 00:00:00 2001
From: cwx232124 cwx232124@notesmail.huawei.com
Date: Fri, 20 Jan 2017 16:07:51 +0800
Subject: [PATCH] hikey960 uart5 uart6 open.

---

arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 5 +++++
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 12 +++++++++++-
2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index b96b313..787de2b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -18,6 +18,7 @@

aliases {
	serial5 = &uart5;       /* console UART */

•   serial6 = &uart6;
  

  };

  chosen {
  @@ -33,5 +34,9 @@
  uart5: serial@fdf05000 {
  status = "ok";
  };

•   uart6: uart@fff32000 {
  

•   	status = "ok";
  

•   };
  

  };
  };
  diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
  index 5389799..f803f61 100644
  --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
  +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
  @@ -279,7 +279,17 @@
  clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
  <&crg_ctrl HI3660_CLK_GATE_UART5>;
  clock-names = "uartclk", "apb_pclk";

•   	status = "ok";
  

•   	status = "disabled";
  

•   };
  

•   uart6: uart@fff32000 {
  

•   	compatible = "arm,pl011", "arm,primecell";
  

•   	reg = <0x0 0xfff32000 0x0 0x1000>;
  

•   	interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
  

•   	clocks = <&crg_ctrl HI3660_CLK_UART6>,
  

•   		 <&crg_ctrl HI3660_PCLK>;
  

•   	clock-names = "uartclk", "apb_pclk";
  

•   	status = "disabled";
    };
  

  };
  };
  --
  2.7.4