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| 1 | +/* user_settings.h |
| 2 | + * |
| 3 | + * Copyright (C) 2006-2023 wolfSSL Inc. |
| 4 | + * |
| 5 | + * This file is part of wolfSSL. |
| 6 | + * |
| 7 | + * wolfSSL is free software; you can redistribute it and/or modify |
| 8 | + * it under the terms of the GNU General Public License as published by |
| 9 | + * the Free Software Foundation; either version 2 of the License, or |
| 10 | + * (at your option) any later version. |
| 11 | + * |
| 12 | + * wolfSSL is distributed in the hope that it will be useful, |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | + * GNU General Public License for more details. |
| 16 | + * |
| 17 | + * You should have received a copy of the GNU General Public License |
| 18 | + * along with this program; if not, write to the Free Software |
| 19 | + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA |
| 20 | + */ |
| 21 | + |
| 22 | +#undef WOLFSSL_ESPIDF |
| 23 | +#undef WOLFSSL_ESP32 |
| 24 | +#undef WOLFSSL_ESPWROOM32SE |
| 25 | +#undef WOLFSSL_ESP32 |
| 26 | +#undef WOLFSSL_ESP8266 |
| 27 | + |
| 28 | +/* The Espressif sdkconfig will have chipset info. |
| 29 | +** |
| 30 | +** Possible values: |
| 31 | +** |
| 32 | +** CONFIG_IDF_TARGET_ESP32 |
| 33 | +** CONFIG_IDF_TARGET_ESP32S3 |
| 34 | +** CONFIG_IDF_TARGET_ESP32C3 |
| 35 | +** CONFIG_IDF_TARGET_ESP32C6 |
| 36 | +*/ |
| 37 | +#include <sdkconfig.h> |
| 38 | + |
| 39 | +#define WOLFSSL_ESPIDF |
| 40 | + |
| 41 | +/* |
| 42 | + * choose ONE of these Espressif chips to define: |
| 43 | + * |
| 44 | + * WOLFSSL_ESP32 |
| 45 | + * WOLFSSL_ESPWROOM32SE |
| 46 | + * WOLFSSL_ESP8266 |
| 47 | + */ |
| 48 | + |
| 49 | +#define WOLFSSL_ESP32 |
| 50 | + |
| 51 | +/* #define DEBUG_WOLFSSL_VERBOSE */ |
| 52 | + |
| 53 | +#define BENCH_EMBEDDED |
| 54 | +#define USE_CERT_BUFFERS_2048 |
| 55 | + |
| 56 | +/* TLS 1.3 */ |
| 57 | +#define WOLFSSL_TLS13 |
| 58 | +#define HAVE_TLS_EXTENSIONS |
| 59 | +#define WC_RSA_PSS |
| 60 | +#define HAVE_HKDF |
| 61 | +#define HAVE_AEAD |
| 62 | +#define HAVE_SUPPORTED_CURVES |
| 63 | + |
| 64 | +/* when you want to use SINGLE THREAD */ |
| 65 | +/* #define SINGLE_THREADED */ |
| 66 | +#define NO_FILESYSTEM |
| 67 | + |
| 68 | +#define HAVE_AESGCM |
| 69 | +/* when you want to use SHA384 */ |
| 70 | +/* #define WOLFSSL_SHA384 */ |
| 71 | +#define WOLFSSL_SHA512 |
| 72 | +#define HAVE_ECC |
| 73 | +#define HAVE_CURVE25519 |
| 74 | +#define CURVE25519_SMALL |
| 75 | +#define HAVE_ED25519 |
| 76 | + |
| 77 | +/* when you want to use pkcs7 */ |
| 78 | +/* #define HAVE_PKCS7 */ |
| 79 | + |
| 80 | +#if defined(HAVE_PKCS7) |
| 81 | + #define HAVE_AES_KEYWRAP |
| 82 | + #define HAVE_X963_KDF |
| 83 | + #define WOLFSSL_AES_DIRECT |
| 84 | +#endif |
| 85 | + |
| 86 | +/* when you want to use aes counter mode */ |
| 87 | +/* #define WOLFSSL_AES_DIRECT */ |
| 88 | +/* #define WOLFSSL_AES_COUNTER */ |
| 89 | + |
| 90 | +/* esp32-wroom-32se specific definition */ |
| 91 | +#if defined(WOLFSSL_ESPWROOM32SE) |
| 92 | + #define WOLFSSL_ATECC508A |
| 93 | + #define HAVE_PK_CALLBACKS |
| 94 | + /* when you want to use a custom slot allocation for ATECC608A */ |
| 95 | + /* unless your configuration is unusual, you can use default */ |
| 96 | + /* implementation. */ |
| 97 | + /* #define CUSTOM_SLOT_ALLOCATION */ |
| 98 | +#endif |
| 99 | + |
| 100 | +/* RSA primitive specific definition */ |
| 101 | +#if defined(WOLFSSL_ESP32) || defined(WOLFSSL_ESPWROOM32SE) |
| 102 | + /* Define USE_FAST_MATH and SMALL_STACK */ |
| 103 | + #define ESP32_USE_RSA_PRIMITIVE |
| 104 | + /* threshold for performance adjustment for HW primitive use */ |
| 105 | + /* X bits of G^X mod P greater than */ |
| 106 | + #define EPS_RSA_EXPT_XBTIS 36 |
| 107 | + /* X and Y of X * Y mod P greater than */ |
| 108 | + #define ESP_RSA_MULM_BITS 2000 |
| 109 | +#endif |
| 110 | + |
| 111 | +/* debug options */ |
| 112 | +/* #define DEBUG_WOLFSSL */ |
| 113 | +/* #define WOLFSSL_ESP32_CRYPT_DEBUG */ |
| 114 | +/* #define WOLFSSL_ATECC508A_DEBUG */ |
| 115 | + |
| 116 | +/* date/time */ |
| 117 | +/* if it cannot adjust time in the device, */ |
| 118 | +/* enable macro below */ |
| 119 | +/* #define NO_ASN_TIME */ |
| 120 | +/* #define XTIME time */ |
| 121 | + |
| 122 | + |
| 123 | +/* adjust wait-timeout count if you see timeout in RSA HW acceleration */ |
| 124 | +#define ESP_RSA_TIMEOUT_CNT 0x249F00 |
| 125 | + |
| 126 | +#if defined(CONFIG_IDF_TARGET_ESP32) |
| 127 | + /* when you want not to use HW acceleration on ESP32 (below for S3, etc */ |
| 128 | + /* #define NO_ESP32_CRYPT */ |
| 129 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
| 130 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 131 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 132 | +#elif defined(CONFIG_IDF_TARGET_ESP32S2) |
| 133 | + /* ESP32-S2 disabled by default; not implemented */ |
| 134 | + #define NO_ESP32_CRYPT |
| 135 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH |
| 136 | + #define NO_WOLFSSL_ESP32_CRYPT_AES |
| 137 | + #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 138 | +#elif defined(CONFIG_IDF_TARGET_ESP32S3) |
| 139 | + /* when you want not to use HW acceleration on ESP32-S3 */ |
| 140 | + /* #define NO_ESP32_CRYPT */ |
| 141 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
| 142 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 143 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 144 | +#elif defined(CONFIG_IDF_TARGET_ESP32C3) |
| 145 | + /* ESP32-C3 disabled by default, not implemented */ |
| 146 | + #define NO_ESP32_CRYPT |
| 147 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH |
| 148 | + #define NO_WOLFSSL_ESP32_CRYPT_AES |
| 149 | + #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 150 | +#elif defined(CONFIG_IDF_TARGET_ESP32C6) |
| 151 | + /* ESP32-C6 disabled by default, not implemented */ |
| 152 | + #define NO_ESP32_CRYPT |
| 153 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH |
| 154 | + #define NO_WOLFSSL_ESP32_CRYPT_AES |
| 155 | + #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 156 | +#elif defined(CONFIG_IDF_TARGET_ESP32H2) |
| 157 | + /* ESP32-H2 disabled by default, not implemented */ |
| 158 | + #define NO_ESP32_CRYPT |
| 159 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH |
| 160 | + #define NO_WOLFSSL_ESP32_CRYPT_AES |
| 161 | + #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 162 | +#else |
| 163 | + /* anything else unknown will have HW disabled by default */ |
| 164 | + #define NO_ESP32_CRYPT |
| 165 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH |
| 166 | + #define NO_WOLFSSL_ESP32_CRYPT_AES |
| 167 | + #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 168 | +#endif |
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