@@ -3477,6 +3477,156 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
34773477 * CPU: PPC64
34783478 */
34793479
3480+ #ifdef __APPLE__
3481+
3482+ /* Multiply va by vb and store double size result in: vh | vl */
3483+ #define SP_ASM_MUL(vl, vh, va, vb) \
3484+ __asm__ __volatile__ ( \
3485+ "mulld %[l], %[a], %[b] \n\t" \
3486+ "mulhdu %[h], %[a], %[b] \n\t" \
3487+ : [h] "+r" (vh), [l] "+r" (vl) \
3488+ : [a] "r" (va), [b] "r" (vb) \
3489+ : "memory" \
3490+ )
3491+ /* Multiply va by vb and store double size result in: vo | vh | vl */
3492+ #define SP_ASM_MUL_SET(vl, vh, vo, va, vb) \
3493+ __asm__ __volatile__ ( \
3494+ "mulhdu %[h], %[a], %[b] \n\t" \
3495+ "mulld %[l], %[a], %[b] \n\t" \
3496+ "li %[o], 0 \n\t" \
3497+ : [l] "+r" (vl), [h] "+r" (vh), [o] "=r" (vo) \
3498+ : [a] "r" (va), [b] "r" (vb) \
3499+ : \
3500+ )
3501+ /* Multiply va by vb and add double size result into: vo | vh | vl */
3502+ #define SP_ASM_MUL_ADD(vl, vh, vo, va, vb) \
3503+ __asm__ __volatile__ ( \
3504+ "mulld r16, %[a], %[b] \n\t" \
3505+ "mulhdu r17, %[a], %[b] \n\t" \
3506+ "addc %[l], %[l], r16 \n\t" \
3507+ "adde %[h], %[h], r17 \n\t" \
3508+ "addze %[o], %[o] \n\t" \
3509+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3510+ : [a] "r" (va), [b] "r" (vb) \
3511+ : "r16", "r17", "cc" \
3512+ )
3513+ /* Multiply va by vb and add double size result into: vh | vl */
3514+ #define SP_ASM_MUL_ADD_NO(vl, vh, va, vb) \
3515+ __asm__ __volatile__ ( \
3516+ "mulld r16, %[a], %[b] \n\t" \
3517+ "mulhdu r17, %[a], %[b] \n\t" \
3518+ "addc %[l], %[l], r16 \n\t" \
3519+ "adde %[h], %[h], r17 \n\t" \
3520+ : [l] "+r" (vl), [h] "+r" (vh) \
3521+ : [a] "r" (va), [b] "r" (vb) \
3522+ : "r16", "r17", "cc" \
3523+ )
3524+ /* Multiply va by vb and add double size result twice into: vo | vh | vl */
3525+ #define SP_ASM_MUL_ADD2(vl, vh, vo, va, vb) \
3526+ __asm__ __volatile__ ( \
3527+ "mulld r16, %[a], %[b] \n\t" \
3528+ "mulhdu r17, %[a], %[b] \n\t" \
3529+ "addc %[l], %[l], r16 \n\t" \
3530+ "adde %[h], %[h], r17 \n\t" \
3531+ "addze %[o], %[o] \n\t" \
3532+ "addc %[l], %[l], r16 \n\t" \
3533+ "adde %[h], %[h], r17 \n\t" \
3534+ "addze %[o], %[o] \n\t" \
3535+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3536+ : [a] "r" (va), [b] "r" (vb) \
3537+ : "r16", "r17", "cc" \
3538+ )
3539+ /* Multiply va by vb and add double size result twice into: vo | vh | vl
3540+ * Assumes first add will not overflow vh | vl
3541+ */
3542+ #define SP_ASM_MUL_ADD2_NO(vl, vh, vo, va, vb) \
3543+ __asm__ __volatile__ ( \
3544+ "mulld r16, %[a], %[b] \n\t" \
3545+ "mulhdu r17, %[a], %[b] \n\t" \
3546+ "addc %[l], %[l], r16 \n\t" \
3547+ "adde %[h], %[h], r17 \n\t" \
3548+ "addc %[l], %[l], r16 \n\t" \
3549+ "adde %[h], %[h], r17 \n\t" \
3550+ "addze %[o], %[o] \n\t" \
3551+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3552+ : [a] "r" (va), [b] "r" (vb) \
3553+ : "r16", "r17", "cc" \
3554+ )
3555+ /* Square va and store double size result in: vh | vl */
3556+ #define SP_ASM_SQR(vl, vh, va) \
3557+ __asm__ __volatile__ ( \
3558+ "mulld %[l], %[a], %[a] \n\t" \
3559+ "mulhdu %[h], %[a], %[a] \n\t" \
3560+ : [h] "+r" (vh), [l] "+r" (vl) \
3561+ : [a] "r" (va) \
3562+ : "memory" \
3563+ )
3564+ /* Square va and add double size result into: vo | vh | vl */
3565+ #define SP_ASM_SQR_ADD(vl, vh, vo, va) \
3566+ __asm__ __volatile__ ( \
3567+ "mulld r16, %[a], %[a] \n\t" \
3568+ "mulhdu r17, %[a], %[a] \n\t" \
3569+ "addc %[l], %[l], r16 \n\t" \
3570+ "adde %[h], %[h], r17 \n\t" \
3571+ "addze %[o], %[o] \n\t" \
3572+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3573+ : [a] "r" (va) \
3574+ : "r16", "r17", "cc" \
3575+ )
3576+ /* Square va and add double size result into: vh | vl */
3577+ #define SP_ASM_SQR_ADD_NO(vl, vh, va) \
3578+ __asm__ __volatile__ ( \
3579+ "mulld r16, %[a], %[a] \n\t" \
3580+ "mulhdu r17, %[a], %[a] \n\t" \
3581+ "addc %[l], %[l], r16 \n\t" \
3582+ "adde %[h], %[h], r17 \n\t" \
3583+ : [l] "+r" (vl), [h] "+r" (vh) \
3584+ : [a] "r" (va) \
3585+ : "r16", "r17", "cc" \
3586+ )
3587+ /* Add va into: vh | vl */
3588+ #define SP_ASM_ADDC(vl, vh, va) \
3589+ __asm__ __volatile__ ( \
3590+ "addc %[l], %[l], %[a] \n\t" \
3591+ "addze %[h], %[h] \n\t" \
3592+ : [l] "+r" (vl), [h] "+r" (vh) \
3593+ : [a] "r" (va) \
3594+ : "cc" \
3595+ )
3596+ /* Sub va from: vh | vl */
3597+ #define SP_ASM_SUBB(vl, vh, va) \
3598+ __asm__ __volatile__ ( \
3599+ "subfc %[l], %[a], %[l] \n\t" \
3600+ "li r16, 0 \n\t" \
3601+ "subfe %[h], r16, %[h] \n\t" \
3602+ : [l] "+r" (vl), [h] "+r" (vh) \
3603+ : [a] "r" (va) \
3604+ : "r16", "cc" \
3605+ )
3606+ /* Add two times vc | vb | va into vo | vh | vl */
3607+ #define SP_ASM_ADD_DBL_3(vl, vh, vo, va, vb, vc) \
3608+ __asm__ __volatile__ ( \
3609+ "addc %[l], %[l], %[a] \n\t" \
3610+ "adde %[h], %[h], %[b] \n\t" \
3611+ "adde %[o], %[o], %[c] \n\t" \
3612+ "addc %[l], %[l], %[a] \n\t" \
3613+ "adde %[h], %[h], %[b] \n\t" \
3614+ "adde %[o], %[o], %[c] \n\t" \
3615+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3616+ : [a] "r" (va), [b] "r" (vb), [c] "r" (vc) \
3617+ : "cc" \
3618+ )
3619+ /* Count leading zeros. */
3620+ #define SP_ASM_LZCNT(va, vn) \
3621+ __asm__ __volatile__ ( \
3622+ "cntlzd %[n], %[a] \n\t" \
3623+ : [n] "=r" (vn) \
3624+ : [a] "r" (va) \
3625+ : \
3626+ )
3627+
3628+ #else /* !defined(__APPLE__) */
3629+
34803630/* Multiply va by vb and store double size result in: vh | vl */
34813631#define SP_ASM_MUL(vl, vh, va, vb) \
34823632 __asm__ __volatile__ ( \
@@ -3623,6 +3773,8 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
36233773 : \
36243774 )
36253775
3776+ #endif /* !defined(__APPLE__) */
3777+
36263778#define SP_INT_ASM_AVAILABLE
36273779
36283780 #endif /* WOLFSSL_SP_PPC64 && SP_WORD_SIZE == 64 */
@@ -3632,6 +3784,154 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
36323784 * CPU: PPC 32-bit
36333785 */
36343786
3787+ #ifdef __APPLE__
3788+
3789+ /* Multiply va by vb and store double size result in: vh | vl */
3790+ #define SP_ASM_MUL(vl, vh, va, vb) \
3791+ __asm__ __volatile__ ( \
3792+ "mullw %[l], %[a], %[b] \n\t" \
3793+ "mulhwu %[h], %[a], %[b] \n\t" \
3794+ : [h] "+r" (vh), [l] "+r" (vl) \
3795+ : [a] "r" (va), [b] "r" (vb) \
3796+ : "memory" \
3797+ )
3798+ /* Multiply va by vb and store double size result in: vo | vh | vl */
3799+ #define SP_ASM_MUL_SET(vl, vh, vo, va, vb) \
3800+ __asm__ __volatile__ ( \
3801+ "mulhwu %[h], %[a], %[b] \n\t" \
3802+ "mullw %[l], %[a], %[b] \n\t" \
3803+ "li %[o], 0 \n\t" \
3804+ : [l] "+r" (vl), [h] "+r" (vh), [o] "=r" (vo) \
3805+ : [a] "r" (va), [b] "r" (vb) \
3806+ )
3807+ /* Multiply va by vb and add double size result into: vo | vh | vl */
3808+ #define SP_ASM_MUL_ADD(vl, vh, vo, va, vb) \
3809+ __asm__ __volatile__ ( \
3810+ "mullw r16, %[a], %[b] \n\t" \
3811+ "mulhwu r17, %[a], %[b] \n\t" \
3812+ "addc %[l], %[l], r16 \n\t" \
3813+ "adde %[h], %[h], r17 \n\t" \
3814+ "addze %[o], %[o] \n\t" \
3815+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3816+ : [a] "r" (va), [b] "r" (vb) \
3817+ : "r16", "r17", "cc" \
3818+ )
3819+ /* Multiply va by vb and add double size result into: vh | vl */
3820+ #define SP_ASM_MUL_ADD_NO(vl, vh, va, vb) \
3821+ __asm__ __volatile__ ( \
3822+ "mullw r16, %[a], %[b] \n\t" \
3823+ "mulhwu r17, %[a], %[b] \n\t" \
3824+ "addc %[l], %[l], r16 \n\t" \
3825+ "adde %[h], %[h], r17 \n\t" \
3826+ : [l] "+r" (vl), [h] "+r" (vh) \
3827+ : [a] "r" (va), [b] "r" (vb) \
3828+ : "r16", "r17", "cc" \
3829+ )
3830+ /* Multiply va by vb and add double size result twice into: vo | vh | vl */
3831+ #define SP_ASM_MUL_ADD2(vl, vh, vo, va, vb) \
3832+ __asm__ __volatile__ ( \
3833+ "mullw r16, %[a], %[b] \n\t" \
3834+ "mulhwu r17, %[a], %[b] \n\t" \
3835+ "addc %[l], %[l], r16 \n\t" \
3836+ "adde %[h], %[h], r17 \n\t" \
3837+ "addze %[o], %[o] \n\t" \
3838+ "addc %[l], %[l], r16 \n\t" \
3839+ "adde %[h], %[h], r17 \n\t" \
3840+ "addze %[o], %[o] \n\t" \
3841+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3842+ : [a] "r" (va), [b] "r" (vb) \
3843+ : "r16", "r17", "cc" \
3844+ )
3845+ /* Multiply va by vb and add double size result twice into: vo | vh | vl
3846+ * Assumes first add will not overflow vh | vl
3847+ */
3848+ #define SP_ASM_MUL_ADD2_NO(vl, vh, vo, va, vb) \
3849+ __asm__ __volatile__ ( \
3850+ "mullw r16, %[a], %[b] \n\t" \
3851+ "mulhwu r17, %[a], %[b] \n\t" \
3852+ "addc %[l], %[l], r16 \n\t" \
3853+ "adde %[h], %[h], r17 \n\t" \
3854+ "addc %[l], %[l], r16 \n\t" \
3855+ "adde %[h], %[h], r17 \n\t" \
3856+ "addze %[o], %[o] \n\t" \
3857+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3858+ : [a] "r" (va), [b] "r" (vb) \
3859+ : "r16", "r17", "cc" \
3860+ )
3861+ /* Square va and store double size result in: vh | vl */
3862+ #define SP_ASM_SQR(vl, vh, va) \
3863+ __asm__ __volatile__ ( \
3864+ "mullw %[l], %[a], %[a] \n\t" \
3865+ "mulhwu %[h], %[a], %[a] \n\t" \
3866+ : [h] "+r" (vh), [l] "+r" (vl) \
3867+ : [a] "r" (va) \
3868+ : "memory" \
3869+ )
3870+ /* Square va and add double size result into: vo | vh | vl */
3871+ #define SP_ASM_SQR_ADD(vl, vh, vo, va) \
3872+ __asm__ __volatile__ ( \
3873+ "mullw r16, %[a], %[a] \n\t" \
3874+ "mulhwu r17, %[a], %[a] \n\t" \
3875+ "addc %[l], %[l], r16 \n\t" \
3876+ "adde %[h], %[h], r17 \n\t" \
3877+ "addze %[o], %[o] \n\t" \
3878+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3879+ : [a] "r" (va) \
3880+ : "r16", "r17", "cc" \
3881+ )
3882+ /* Square va and add double size result into: vh | vl */
3883+ #define SP_ASM_SQR_ADD_NO(vl, vh, va) \
3884+ __asm__ __volatile__ ( \
3885+ "mullw r16, %[a], %[a] \n\t" \
3886+ "mulhwu r17, %[a], %[a] \n\t" \
3887+ "addc %[l], %[l], r16 \n\t" \
3888+ "adde %[h], %[h], r17 \n\t" \
3889+ : [l] "+r" (vl), [h] "+r" (vh) \
3890+ : [a] "r" (va) \
3891+ : "r16", "r17", "cc" \
3892+ )
3893+ /* Add va into: vh | vl */
3894+ #define SP_ASM_ADDC(vl, vh, va) \
3895+ __asm__ __volatile__ ( \
3896+ "addc %[l], %[l], %[a] \n\t" \
3897+ "addze %[h], %[h] \n\t" \
3898+ : [l] "+r" (vl), [h] "+r" (vh) \
3899+ : [a] "r" (va) \
3900+ : "cc" \
3901+ )
3902+ /* Sub va from: vh | vl */
3903+ #define SP_ASM_SUBB(vl, vh, va) \
3904+ __asm__ __volatile__ ( \
3905+ "subfc %[l], %[a], %[l] \n\t" \
3906+ "li r16, 0 \n\t" \
3907+ "subfe %[h], r16, %[h] \n\t" \
3908+ : [l] "+r" (vl), [h] "+r" (vh) \
3909+ : [a] "r" (va) \
3910+ : "r16", "cc" \
3911+ )
3912+ /* Add two times vc | vb | va into vo | vh | vl */
3913+ #define SP_ASM_ADD_DBL_3(vl, vh, vo, va, vb, vc) \
3914+ __asm__ __volatile__ ( \
3915+ "addc %[l], %[l], %[a] \n\t" \
3916+ "adde %[h], %[h], %[b] \n\t" \
3917+ "adde %[o], %[o], %[c] \n\t" \
3918+ "addc %[l], %[l], %[a] \n\t" \
3919+ "adde %[h], %[h], %[b] \n\t" \
3920+ "adde %[o], %[o], %[c] \n\t" \
3921+ : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
3922+ : [a] "r" (va), [b] "r" (vb), [c] "r" (vc) \
3923+ : "cc" \
3924+ )
3925+ /* Count leading zeros. */
3926+ #define SP_ASM_LZCNT(va, vn) \
3927+ __asm__ __volatile__ ( \
3928+ "cntlzw %[n], %[a] \n\t" \
3929+ : [n] "=r" (vn) \
3930+ : [a] "r" (va) \
3931+ )
3932+
3933+ #else /* !defined(__APPLE__) */
3934+
36353935/* Multiply va by vb and store double size result in: vh | vl */
36363936#define SP_ASM_MUL(vl, vh, va, vb) \
36373937 __asm__ __volatile__ ( \
@@ -3776,6 +4076,8 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
37764076 : [a] "r" (va) \
37774077 )
37784078
4079+ #endif /* !defined(__APPLE__) */
4080+
37794081#define SP_INT_ASM_AVAILABLE
37804082
37814083 #endif /* WOLFSSL_SP_PPC && SP_WORD_SIZE == 64 */
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