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Merge pull request #6937 from dgarske/stm32wl
Support for the STM32WL55 and PKA improvements for ECC parameters
2 parents 9e34ed9 + 0dde07e commit 2ee9402

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Lines changed: 435 additions & 375 deletions

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‎IDE/STM32Cube/README.md‎

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@@ -31,7 +31,7 @@ You need both the STM32 IDE and the STM32 initialization code generator (STM32Cu
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2. Under “Software Packs” choose “Select Components”.
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3. Find and check all components for the wolfSSL.wolfSSL packs (wolfSSL / Core, wolfCrypt / Core and wolfCrypt / Test). Close
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4. Under the “Software Packs” section click on “wolfSSL.wolfSSL” and configure the parameters.
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5. For Cortex-M recommend “Math Configuration” -> “Single Precision Cortex-M Math” for the fastest option.
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5. For Cortex-M recommend “Math Configuration” -> “Single Precision Cortex-M Math” for the fastest option. If seeing `error: r7 cannot be used in 'asm` add `-fomit-frame-pointer` to the CFLAGS. This only happens in debug builds, because r7 is used for debug.
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6. Hit the "Generate Code" button
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7. Open the project in STM32CubeIDE
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8. The Benchmark example uses float. To enable go to "Project Properties" -> "C/C++ Build" -> "Settings" -> "Tool Settings" -> "MCU Settings" -> Check "Use float with printf".
@@ -87,6 +87,7 @@ The section for "Hardware platform" may need to be adjusted depending on your pr
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* To enable STM32L5 support define `WOLFSSL_STM32L5`.
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* To enable STM32H7 support define `WOLFSSL_STM32H7`.
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* To enable STM32WB support define `WOLFSSL_STM32WB`.
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* To enable STM32WL support define `WOLFSSL_STM32WL`.
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* To enable STM32U5 support define `WOLFSSL_STM32U5`.
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* To enable STM32H5 support define `WOLFSSL_STM32H5`.
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‎IDE/STM32Cube/STM32_Benchmarks.md‎

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@@ -2,6 +2,7 @@
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* [STM32H753ZI](#stm32h753zi)
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* [STM32WB55](#stm32wb55)
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* [STM32WL55](#stm32wl55)
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* [STM32F437](#stm32f437)
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* [STM32L4A6Z](#stm32l4a6z)
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* [STM32L562E](#stm32l562e)
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* [STM32H563ZI](#stm32h563zi)
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* [STM32G071RB](#stm32g071rb)
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## STM32H753ZI
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Supports RNG, AES CBC/GCM and SHA-2 acceleration.
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Benchmark Test: Return code 0
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```
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## STM32WB55
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Supports RNG, ECC P-256, AES-CBC and SHA-256 acceleration.
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Benchmark Test: Return code 0
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```
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## STM32WL55
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Supports RNG, ECC P-256 and AES-CBC acceleration.
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Note: SP math beats PKA HW. HW RNG on for all tests
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Board: NUCLEO-WL55JC1 (MB1389-HIGHBAND-E02)
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CPU: Cortex-M4 at 64 MHz
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IDE: STM32CubeIDE
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RTOS: Bare-Metal
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### STM32WL55 (STM AES-CBC Acceleration, -Os, SP-ASM Cortex-M WOLF_CONF_MATH=4)
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```
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------------------------------------------------------------------------------
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wolfSSL version 5.6.4
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------------------------------------------------------------------------------
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wolfCrypt Benchmark (block bytes 1024, min 1.0 sec each)
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RNG 200 KiB took 1.012 seconds, 197.628 KiB/s
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AES-128-CBC-enc 2 MiB took 1.000 seconds, 2.246 MiB/s
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AES-128-CBC-dec 2 MiB took 1.004 seconds, 2.213 MiB/s
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AES-256-CBC-enc 2 MiB took 1.008 seconds, 2.228 MiB/s
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AES-256-CBC-dec 2 MiB took 1.000 seconds, 2.197 MiB/s
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SHA-256 600 KiB took 1.000 seconds, 600.000 KiB/s
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HMAC-SHA256 600 KiB took 1.012 seconds, 592.885 KiB/s
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ECC [ SECP256R1] 256 key gen 56 ops took 1.023 sec, avg 18.268 ms, 54.741 ops/sec
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ECDHE [ SECP256R1] 256 agree 26 ops took 1.024 sec, avg 39.385 ms, 25.391 ops/sec
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ECDSA [ SECP256R1] 256 sign 30 ops took 1.019 sec, avg 33.967 ms, 29.441 ops/sec
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ECDSA [ SECP256R1] 256 verify 18 ops took 1.098 sec, avg 61.000 ms, 16.393 ops/sec
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Benchmark complete
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Benchmark Test: Return code 0
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```
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### STM32WL55 (STM AES-CBC Acceleration and PKA ECC, -Os)
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```
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------------------------------------------------------------------------------
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wolfSSL version 5.6.4
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------------------------------------------------------------------------------
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wolfCrypt Benchmark (block bytes 1024, min 1.0 sec each)
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RNG 200 KiB took 1.000 seconds, 200.000 KiB/s
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AES-128-CBC-enc 2 MiB took 1.000 seconds, 2.295 MiB/s
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AES-128-CBC-dec 2 MiB took 1.007 seconds, 2.279 MiB/s
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AES-256-CBC-enc 2 MiB took 1.000 seconds, 2.295 MiB/s
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AES-256-CBC-dec 2 MiB took 1.008 seconds, 2.252 MiB/s
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SHA-256 575 KiB took 1.043 seconds, 551.294 KiB/s
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HMAC-SHA256 550 KiB took 1.000 seconds, 550.000 KiB/s
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ECC [ SECP256R1] 256 key gen 4 ops took 1.172 sec, avg 293.000 ms, 3.413 ops/sec
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ECDHE [ SECP256R1] 256 agree 4 ops took 1.165 sec, avg 291.250 ms, 3.433 ops/sec
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ECDSA [ SECP256R1] 256 sign 10 ops took 1.070 sec, avg 107.000 ms, 9.346 ops/sec
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ECDSA [ SECP256R1] 256 verify 6 ops took 1.275 sec, avg 212.500 ms, 4.706 ops/sec
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Benchmark complete
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Benchmark Test: Return code 0
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```
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### STM32WL55 (No HW Crypto, -Os, SP Math All (WOLF_CONF_MATH=6))
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```
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------------------------------------------------------------------------------
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wolfSSL version 5.6.4
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------------------------------------------------------------------------------
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wolfCrypt Benchmark (block bytes 1024, min 1.0 sec each)
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RNG 200 KiB took 1.015 seconds, 197.044 KiB/s
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AES-128-CBC-enc 400 KiB took 1.004 seconds, 398.406 KiB/s
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AES-128-CBC-dec 400 KiB took 1.000 seconds, 400.000 KiB/s
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AES-192-CBC-enc 350 KiB took 1.031 seconds, 339.476 KiB/s
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AES-192-CBC-dec 350 KiB took 1.028 seconds, 340.467 KiB/s
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AES-256-CBC-enc 300 KiB took 1.007 seconds, 297.915 KiB/s
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AES-256-CBC-dec 300 KiB took 1.004 seconds, 298.805 KiB/s
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SHA-256 550 KiB took 1.016 seconds, 541.339 KiB/s
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HMAC-SHA256 550 KiB took 1.024 seconds, 537.109 KiB/s
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ECC [ SECP256R1] 256 key gen 4 ops took 1.180 sec, avg 295.000 ms, 3.390 ops/sec
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ECDHE [ SECP256R1] 256 agree 4 ops took 1.181 sec, avg 295.250 ms, 3.387 ops/sec
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ECDSA [ SECP256R1] 256 sign 4 ops took 1.306 sec, avg 326.500 ms, 3.063 ops/sec
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ECDSA [ SECP256R1] 256 verify 2 ops took 1.188 sec, avg 594.000 ms, 1.684 ops/sec
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Benchmark complete
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Benchmark Test: Return code 0
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```
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## STM32F437
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Supports RNG, AES-CBC/GCM and SHA-256 acceleration.
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Benchmark Test: Return code 0
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```
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## STM32L4A6Z
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Supports RNG, AES-CBC/GCM and SHA-256 acceleration.
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### STM32L4A6Z (STM Crypto/Hash Acceleration, -Os, SP-ASM Cortex-M)
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```
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------------------------------------------------------------------------------
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wolfSSL version 4.4.1
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Benchmark Test: Return code 0
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```
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## STM32L562E
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Supports RNG, AES-CBC/GCM and SHA-256 acceleration.
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Benchmark Test: Return code 0
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```
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## STM32F777
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Supports RNG, AES-CBC/GCM and SHA-256 acceleration.
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Benchmark Test: Return code 0
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```
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## STM32U585
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Supports RNG, AES CBC/GCM and SHA-1,SHA-2 acceleration.
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Benchmark Test: Return code 0
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```
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## STM32H563ZI
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Cortex-M33 at 150MHz

‎IDE/STM32Cube/default_conf.ftl‎

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[#list SWIPdatas as SWIP]
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[#-- Global variables --]
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[#if SWIP.variables??]
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[#list SWIP.variables as variable]
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[#list SWIP.variables as variable]
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extern ${variable.value} ${variable.name};
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[/#list]
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[/#list]
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[/#if]
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[#-- Global variables --]
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[#assign version = SWIP.version]
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/**
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MiddleWare name : ${instName}
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MiddleWare fileName : ${fileName}
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MiddleWare version : ${version}
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MiddleWare name : ${instName}
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MiddleWare fileName : ${fileName}
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MiddleWare version : ${version}
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*/
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[#if SWIP.defines??]
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[#list SWIP.defines as definition]
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[#list SWIP.defines as definition]
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/*---------- [#if definition.comments??]${definition.comments}[/#if] -----------*/
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#define ${definition.name} #t#t ${definition.value}
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[#if definition.description??]${definition.description} [/#if]
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[/#list]
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[/#list]
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[/#if]
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#define WOLFSSL_STM32_PKA
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#undef NO_STM32_CRYPTO
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#define HAL_CONSOLE_UART huart1
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#elif defined(STM32WL55xx)
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#define WOLFSSL_STM32WL
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#define WOLFSSL_STM32_PKA
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#undef NO_STM32_CRYPTO
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#define HAL_CONSOLE_UART huart2
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#elif defined(STM32F407xx)
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#define WOLFSSL_STM32F4
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#define HAL_CONSOLE_UART huart2
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//#define NO_STM32_RNG
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//#undef NO_STM32_HASH
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//#undef NO_STM32_CRYPTO
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//#define WOLFSSL_GENSEED_FORTEST /* if no HW RNG is available use test seed */
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/* if no HW RNG is available use test seed */
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//#define WOLFSSL_GENSEED_FORTEST
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//#define STM32_HAL_V2
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#endif
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@@ -242,13 +248,14 @@ extern ${variable.value} ${variable.name};
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#define WOLFSSL_HAVE_SP_ECC
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#endif
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#if WOLF_CONF_MATH == 6 || WOLF_CONF_MATH == 7
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#define WOLFSSL_SP_MATH_ALL /* use sp_int.c multi precision math */
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#else
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#define WOLFSSL_SP_MATH /* disable non-standard curves / key sizes */
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#endif
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#define SP_WORD_SIZE 32
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/* Enable to put all math on stack (no heap) */
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//#define WOLFSSL_SP_NO_MALLOC
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/* Enable for SP cache resistance (not usually enabled for embedded micros) */
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#if WOLF_CONF_MATH == 4 || WOLF_CONF_MATH == 5
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#define WOLFSSL_SP_ASM /* required if using the ASM versions */
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/* Sha3 */
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#undef WOLFSSL_SHA3
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#if defined(WOLF_CONF_SHA3) && WOLF_CONF_SHA3 == 1
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#define WOLFSSL_SHA3
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#define WOLFSSL_SHA3
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#endif
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/* MD5 */
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#if defined(WOLF_CONF_MD5) && WOLF_CONF_MD5 == 1
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/* enabled */
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/* enabled */
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#else
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#define NO_MD5
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#endif
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#if 0
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#define USE_WOLFSSL_MEMORY
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#define WOLFSSL_TRACK_MEMORY
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#define WOLFSSL_DEBUG_MEMORY
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#define WOLFSSL_DEBUG_MEMORY_PRINT
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#define WOLFSSL_DEBUG_MEMORY
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#define WOLFSSL_DEBUG_MEMORY_PRINT
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#endif
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#else
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//#define NO_WOLFSSL_MEMORY

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