|
83 | 83 | #define WOLFSSL_AES_DIRECT |
84 | 84 | #endif |
85 | 85 |
|
86 | | -/* when you want to use aes counter mode */ |
| 86 | +/* when you want to use AES counter mode */ |
87 | 87 | /* #define WOLFSSL_AES_DIRECT */ |
88 | 88 | /* #define WOLFSSL_AES_COUNTER */ |
89 | 89 |
|
|
102 | 102 | /* Define USE_FAST_MATH and SMALL_STACK */ |
103 | 103 | #define ESP32_USE_RSA_PRIMITIVE |
104 | 104 | /* threshold for performance adjustment for HW primitive use */ |
| 105 | + |
| 106 | + /* NOTE HW unreliable for small values on older original ESP32!*/ |
| 107 | + /* threshold for performance adjustment for HW primitive use */ |
105 | 108 | /* X bits of G^X mod P greater than */ |
106 | | - #define EPS_RSA_EXPT_XBTIS 36 |
| 109 | + #undef ESP_RSA_EXPT_XBITS |
| 110 | + #define ESP_RSA_EXPT_XBITS 32 |
| 111 | + |
107 | 112 | /* X and Y of X * Y mod P greater than */ |
108 | | - #define ESP_RSA_MULM_BITS 2000 |
| 113 | + #undef ESP_RSA_MULM_BITS |
| 114 | + #define ESP_RSA_MULM_BITS 16 |
| 115 | + |
109 | 116 | #endif |
110 | 117 |
|
111 | 118 | /* debug options */ |
|
123 | 130 | /* adjust wait-timeout count if you see timeout in RSA HW acceleration */ |
124 | 131 | #define ESP_RSA_TIMEOUT_CNT 0x249F00 |
125 | 132 |
|
| 133 | +/* Default is HW enabled unless turned off. |
| 134 | +** Uncomment these lines to force SW instead of HW acceleration */ |
| 135 | + |
126 | 136 | #if defined(CONFIG_IDF_TARGET_ESP32) |
127 | | - /* when you want not to use HW acceleration on ESP32 (below for S3, etc */ |
128 | | - /* #define NO_ESP32_CRYPT */ |
129 | | - /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
130 | | - /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
131 | | - /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 137 | + /* wolfSSL HW Acceleration supported on ESP32. Uncomment to disable: */ |
| 138 | + /* #define NO_ESP32_CRYPT */ |
| 139 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
| 140 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 141 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 142 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */ |
| 143 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */ |
| 144 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */ |
| 145 | + |
| 146 | + /* These are defined automatically in esp32-crypt.h, here for clarity: */ |
| 147 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224 /* no SHA224 HW on ESP32 */ |
| 148 | + /* end CONFIG_IDF_TARGET_ESP32 */ |
| 149 | + #undef ESP_RSA_MULM_BITS |
| 150 | + #define ESP_RSA_MULM_BITS 16 /* TODO add compile-time warning */ |
| 151 | + /***** END CONFIG_IDF_TARGET_ESP32 *****/ |
| 152 | + |
132 | 153 | #elif defined(CONFIG_IDF_TARGET_ESP32S2) |
133 | | - /* ESP32-S2 disabled by default; not implemented */ |
134 | | - #define NO_ESP32_CRYPT |
135 | | - #define NO_WOLFSSL_ESP32_CRYPT_HASH |
136 | | - #define NO_WOLFSSL_ESP32_CRYPT_AES |
137 | | - #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 154 | + /* wolfSSL HW Acceleration supported on ESP32-S2. Uncomment to disable: */ |
| 155 | + /* #define NO_ESP32_CRYPT */ |
| 156 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
| 157 | + /* Note: There's no AES192 HW on the ESP32-S2; falls back to SW */ |
| 158 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 159 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 160 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */ |
| 161 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */ |
| 162 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */ |
| 163 | + /***** END CONFIG_IDF_TARGET_ESP32S2 *****/ |
| 164 | + |
138 | 165 | #elif defined(CONFIG_IDF_TARGET_ESP32S3) |
139 | | - /* when you want not to use HW acceleration on ESP32-S3 */ |
140 | | - /* #define NO_ESP32_CRYPT */ |
141 | | - /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
142 | | - /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
143 | | - /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 166 | + /* wolfSSL HW Acceleration supported on ESP32-S3. Uncomment to disable: */ |
| 167 | + /* #define NO_ESP32_CRYPT */ |
| 168 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
| 169 | + /* Note: There's no AES192 HW on the ESP32-S3; falls back to SW */ |
| 170 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 171 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 172 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */ |
| 173 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */ |
| 174 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */ |
| 175 | + /***** END CONFIG_IDF_TARGET_ESP32S3 *****/ |
| 176 | + |
144 | 177 | #elif defined(CONFIG_IDF_TARGET_ESP32C3) |
145 | | - /* ESP32-C3 disabled by default, not implemented */ |
146 | | - #define NO_ESP32_CRYPT |
147 | | - #define NO_WOLFSSL_ESP32_CRYPT_HASH |
148 | | - #define NO_WOLFSSL_ESP32_CRYPT_AES |
149 | | - #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 178 | + /* wolfSSL HW Acceleration supported on ESP32-C2. Uncomment to disable: */ |
| 179 | + |
| 180 | + /* #define NO_ESP32_CRYPT */ |
| 181 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ /* to disable all SHA HW */ |
| 182 | + |
| 183 | + /* These are defined automatically in esp32-crypt.h, here for clarity: */ |
| 184 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384 /* no SHA384 HW on C6 */ |
| 185 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512 /* no SHA512 HW on C6 */ |
| 186 | + |
| 187 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 188 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 189 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */ |
| 190 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */ |
| 191 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */ |
| 192 | + /***** END CONFIG_IDF_TARGET_ESP32C3 *****/ |
| 193 | + |
150 | 194 | #elif defined(CONFIG_IDF_TARGET_ESP32C6) |
151 | | - /* ESP32-C6 disabled by default, not implemented */ |
152 | | - #define NO_ESP32_CRYPT |
153 | | - #define NO_WOLFSSL_ESP32_CRYPT_HASH |
154 | | - #define NO_WOLFSSL_ESP32_CRYPT_AES |
155 | | - #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 195 | + /* wolfSSL HW Acceleration supported on ESP32-C6. Uncomment to disable: */ |
| 196 | + |
| 197 | + /* #define NO_ESP32_CRYPT */ |
| 198 | + /* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ |
| 199 | + /* These are defined automatically in esp32-crypt.h, here for clarity: */ |
| 200 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384 /* no SHA384 HW on C6 */ |
| 201 | + #define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512 /* no SHA512 HW on C6 */ |
| 202 | + |
| 203 | + /* #define NO_WOLFSSL_ESP32_CRYPT_AES */ |
| 204 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ |
| 205 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */ |
| 206 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */ |
| 207 | + /* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */ |
| 208 | + /***** END CONFIG_IDF_TARGET_ESP32C6 *****/ |
| 209 | + |
156 | 210 | #elif defined(CONFIG_IDF_TARGET_ESP32H2) |
157 | | - /* ESP32-H2 disabled by default, not implemented */ |
| 211 | + /* wolfSSL Hardware Acceleration not yet implemented */ |
158 | 212 | #define NO_ESP32_CRYPT |
159 | 213 | #define NO_WOLFSSL_ESP32_CRYPT_HASH |
160 | 214 | #define NO_WOLFSSL_ESP32_CRYPT_AES |
161 | 215 | #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 216 | + /***** END CONFIG_IDF_TARGET_ESP32H2 *****/ |
| 217 | + |
162 | 218 | #else |
163 | | - /* anything else unknown will have HW disabled by default */ |
| 219 | + /* Anything else encountered, disable HW accleration */ |
164 | 220 | #define NO_ESP32_CRYPT |
165 | 221 | #define NO_WOLFSSL_ESP32_CRYPT_HASH |
166 | 222 | #define NO_WOLFSSL_ESP32_CRYPT_AES |
167 | 223 | #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI |
| 224 | +#endif /* CONFIG_IDF_TARGET Check */ |
| 225 | + |
| 226 | +/* optional SM4 Ciphers. See https://github.com/wolfSSL/wolfsm |
| 227 | +#define WOLFSSL_SM2 |
| 228 | +#define WOLFSSL_SM3 |
| 229 | +#define WOLFSSL_SM4 |
| 230 | +*/ |
| 231 | + |
| 232 | +#if defined(WOLFSSL_SM2) || defined(WOLFSSL_SM3) || defined(WOLFSSL_SM4) |
| 233 | + #include <wolfssl/certs_test_sm.h> |
| 234 | + #define CTX_CA_CERT root_sm2 |
| 235 | + #define CTX_CA_CERT_SIZE sizeof_root_sm2 |
| 236 | + #define CTX_CA_CERT_TYPE WOLFSSL_FILETYPE_PEM |
| 237 | + #define CTX_SERVER_CERT server_sm2 |
| 238 | + #define CTX_SERVER_CERT_SIZE sizeof_server_sm2 |
| 239 | + #define CTX_SERVER_CERT_TYPE WOLFSSL_FILETYPE_PEM |
| 240 | + #define CTX_SERVER_KEY server_sm2_priv |
| 241 | + #define CTX_SERVER_KEY_SIZE sizeof_server_sm2_priv |
| 242 | + #define CTX_SERVER_KEY_TYPE WOLFSSL_FILETYPE_PEM |
| 243 | + |
| 244 | + #undef WOLFSSL_BASE16 |
| 245 | + #define WOLFSSL_BASE16 |
| 246 | +#else |
| 247 | + #define USE_CERT_BUFFERS_2048 |
| 248 | + #define USE_CERT_BUFFERS_256 |
| 249 | + #define CTX_CA_CERT ca_cert_der_2048 |
| 250 | + #define CTX_CA_CERT_SIZE sizeof_ca_cert_der_2048 |
| 251 | + #define CTX_CA_CERT_TYPE WOLFSSL_FILETYPE_ASN1 |
| 252 | + #define CTX_SERVER_CERT server_cert_der_2048 |
| 253 | + #define CTX_SERVER_CERT_SIZE sizeof_server_cert_der_2048 |
| 254 | + #define CTX_SERVER_CERT_TYPE WOLFSSL_FILETYPE_ASN1 |
| 255 | + #define CTX_SERVER_KEY server_key_der_2048 |
| 256 | + #define CTX_SERVER_KEY_SIZE sizeof_server_key_der_2048 |
| 257 | + #define CTX_SERVER_KEY_TYPE WOLFSSL_FILETYPE_ASN1 |
168 | 258 | #endif |
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