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Commit 1024d7a

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gojimmypi
committed
Fix Espressif SHA512 SW fallback endianness
1 parent 92806a6 commit 1024d7a

2 files changed

Lines changed: 35 additions & 8 deletions

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IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/include/user_settings.h

Lines changed: 25 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -131,8 +131,8 @@
131131
#elif defined(CONFIG_IDF_TARGET_ESP32) || \
132132
defined(CONFIG_IDF_TARGET_ESP32S2) || \
133133
defined(CONFIG_IDF_TARGET_ESP32S3)
134-
/* TODO: SRP Not enabled, known to fail on this target
135-
* See https://github.com/wolfSSL/wolfssl/issues/7210 */
134+
#define WOLFCRYPT_HAVE_SRP
135+
#define FP_MAX_BITS (8192 * 2)
136136
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
137137
defined(CONFIG_IDF_TARGET_ESP32H2)
138138
/* SRP Known to be working on this target::*/
@@ -750,3 +750,26 @@ Turn on timer debugging (used when CPU cycles not available)
750750
#error "Must define USE_CERT_BUFFERS_2048 or USE_CERT_BUFFERS_1024"
751751
#endif
752752
#endif /* Conditional key and cert constant names */
753+
754+
/******************************************************************************
755+
** Sanity Checks
756+
******************************************************************************/
757+
#if defined(CONFIG_ESP_MAIN_TASK_STACK_SIZE)
758+
#if defined(WOLFCRYPT_HAVE_SRP)
759+
#if defined(FP_MAX_BITS)
760+
#if FP_MAX_BITS < (8192 * 2)
761+
#define ESP_SRP_MINIMUM_STACK_8K (24 * 1024)
762+
#else
763+
#define ESP_SRP_MINIMUM_STACK_8K (28 * 1024)
764+
#endif
765+
#else
766+
#error "Please define FP_MAX_BITS when using WOLFCRYPT_HAVE_SRP."
767+
#endif
768+
769+
#if (CONFIG_ESP_MAIN_TASK_STACK_SIZE < ESP_SRP_MINIMUM_STACK)
770+
#warning "WOLFCRYPT_HAVE_SRP enabled with small stack size"
771+
#endif
772+
#endif
773+
#else
774+
#warning "CONFIG_ESP_MAIN_TASK_STACK_SIZE not defined!"
775+
#endif

wolfcrypt/src/sha512.c

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -990,17 +990,19 @@ static WC_INLINE int Sha512Update(wc_Sha512* sha512, const byte* data, word32 le
990990
defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512)
991991
ret = Transform_Sha512(sha512);
992992
#else
993-
if(sha512->ctx.mode == ESP32_SHA_INIT) {
993+
if (sha512->ctx.mode == ESP32_SHA_INIT) {
994994
esp_sha_try_hw_lock(&sha512->ctx);
995995
}
996-
ret = esp_sha512_process(sha512);
997-
if(ret == 0 && sha512->ctx.mode == ESP32_SHA_SW){
996+
if (sha512->ctx.mode == ESP32_SHA_SW) {
998997
ByteReverseWords64(sha512->buffer, sha512->buffer,
999998
WC_SHA512_BLOCK_SIZE);
1000999
ret = Transform_Sha512(sha512);
10011000
}
1001+
else {
1002+
ret = esp_sha512_process(sha512);
1003+
}
10021004
#endif
1003-
if (ret == 0)
1005+
if (ret == ESP_OK)
10041006
sha512->buffLen = 0;
10051007
else
10061008
len = 0;
@@ -1884,7 +1886,8 @@ int wc_Sha512Copy(wc_Sha512* src, wc_Sha512* dst)
18841886
ret = wolfAsync_DevCopy(&src->asyncDev, &dst->asyncDev);
18851887
#endif
18861888

1887-
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW)
1889+
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
1890+
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512)
18881891
#if defined(CONFIG_IDF_TARGET_ESP32)
18891892
if (ret == 0) {
18901893
ret = esp_sha512_ctx_copy(src, dst);
@@ -2169,7 +2172,8 @@ int wc_Sha384Copy(wc_Sha384* src, wc_Sha384* dst)
21692172
ret = wolfAsync_DevCopy(&src->asyncDev, &dst->asyncDev);
21702173
#endif
21712174

2172-
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW)
2175+
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
2176+
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384)
21732177
#if defined(CONFIG_IDF_TARGET_ESP32)
21742178
esp_sha384_ctx_copy(src, dst);
21752179
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \

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