@@ -1378,9 +1378,9 @@ static const char* bench_result_words3[][5] = {
13781378 /* unsigned int max = 4,294,967,295 */
13791379 uint64_t thisVal = 0 ; /* CPU counter, "this current value" as read. */
13801380 uint64_t thisIncrement = 0 ; /* The adjusted increment amount. */
1381- uint64_t expected_diff = 0 ; /* FreeRTOS esimated expected CPU diff. */
1381+ uint64_t expected_diff = 0 ; /* FreeRTOS estimated expected CPU diff.*/
13821382 #ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
1383- uint32_t tickCount = 0 ; /* Currrent rtos tick counter. */
1383+ uint32_t tickCount = 0 ; /* Current rtos tick counter. */
13841384 uint32_t tickDiff = 0 ; /* Tick difference from last check. */
13851385 uint32_t tickBeginDiff = 0 ; /* Tick difference from beginning. */
13861386 #endif
@@ -1459,7 +1459,7 @@ static const char* bench_result_words3[][5] = {
14591459 if (expected_diff > UINT_MAX ) {
14601460 /* The number of cycles expected from FreeRTOS ticks is
14611461 * greater than the maximum size of an unsigned 32-bit
1462- * integer, meaning multiple overflows occured . */
1462+ * integer, meaning multiple overflows occurred . */
14631463 #ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
14641464 ESP_LOGW (TAG , "expected_diff > UINT_MAX (%u)" , UINT_MAX );
14651465 #endif
@@ -1538,7 +1538,7 @@ static const char* bench_result_words3[][5] = {
15381538 _esp_cpu_count_last = esp_cpu_get_cycle_count ();
15391539 #else
15401540 /* TODO: Why doesn't esp_cpu_get_cycle_count work for Xtensa
1541- * when resetting CPU cycle counter? FreeRTOS tick collison ?
1541+ * when resetting CPU cycle counter? FreeRTOS tick collision ?
15421542 * thisVal = esp_cpu_get_cycle_count(); See also, above
15431543 * or thisVal = xthal_get_ccount(); */
15441544 #if ESP_IDF_VERSION_MAJOR < 5
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