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Merge pull request #7081 from gojimmypi/PR-Espressif-ESP32-C2
Add wolfcrypt SHA support for ESP32-C2/ESP8684, other minor updates
2 parents a5a2b37 + 07a5566 commit 00c9625

5 files changed

Lines changed: 150 additions & 51 deletions

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‎IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c‎

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,10 @@
3636
#include <wolfcrypt/test/test.h>
3737
#include <wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h>
3838

39+
/* set to 0 for one benchmark,
40+
** set to 1 for continuous benchmark loop */
41+
#define TEST_LOOP 0
42+
3943
/*
4044
** the wolfssl component can be installed in either:
4145
**
@@ -190,7 +194,10 @@ void app_main(void)
190194
#if defined(NO_ESP32_CRYPT)
191195
ESP_LOGI(TAG, "NO_ESP32_CRYPT defined! HW acceleration DISABLED.");
192196
#else
193-
#if defined(CONFIG_IDF_TARGET_ESP32C3)
197+
#if defined(CONFIG_IDF_TARGET_ESP32C2)
198+
ESP_LOGI(TAG, "ESP32_CRYPT is enabled for ESP32-C2.");
199+
200+
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
194201
ESP_LOGI(TAG, "ESP32_CRYPT is enabled for ESP32-C3.");
195202

196203
#elif defined(CONFIG_IDF_TARGET_ESP32S2)
@@ -239,8 +246,11 @@ void app_main(void)
239246

240247
loops++;
241248
}
242-
while (ret == 0);
243-
ESP_LOGI(TAG, "loops = %d", loops);
249+
while (TEST_LOOP && (ret == 0));
250+
251+
#if defined TEST_LOOP && (TEST_LOOP == 1)
252+
ESP_LOGI(TAG, "Test loops completed: %d", loops);
253+
#endif
244254

245255
/* note wolfCrypt_Cleanup() should always be called when finished.
246256
** This is called at the end of wolf_test_task();
@@ -266,8 +276,12 @@ void app_main(void)
266276
- (uxTaskGetStackHighWaterMark(NULL)));
267277
#endif
268278

279+
#ifdef WOLFSSL_ESPIDF_EXIT_MESSAGE
280+
ESP_LOGI(TAG, WOLFSSL_ESPIDF_EXIT_MESSAGE);
281+
#else
269282
ESP_LOGI(TAG, "\n\nDone!\n\n"
270283
"If running from idf.py monitor, press twice: Ctrl+]");
284+
#endif
271285

272286
/* done */
273287
while (1) {

‎wolfcrypt/src/port/Espressif/esp32_util.c‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -592,9 +592,10 @@ int ShowExtendedSystemInfo(void)
592592
ESP_LOGI(TAG, "CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ = %u MHz",
593593
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
594594
);
595-
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
596-
ESP_LOGI(TAG, "CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ = %u MHz",
597-
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
595+
#elif defined(CONFIG_IDF_TARGET_ESP32C3) && \
596+
defined(CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ)
597+
ESP_LOGI(TAG, "CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ = %u MHz",
598+
CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
598599
);
599600

600601
#elif defined(CONFIG_IDF_TARGET_ESP32C6)

‎wolfcrypt/src/sha.c‎

Lines changed: 50 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -644,9 +644,15 @@ int wc_ShaUpdate(wc_Sha* sha, const byte* data, word32 len)
644644
#endif
645645

646646
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
647-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) \
648-
&& defined(WOLFSSL_ESP32_CRYPT) && \
647+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
648+
defined(CONFIG_IDF_TARGET_ESP8684) || \
649+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
650+
defined(CONFIG_IDF_TARGET_ESP32C6) \
651+
) && \
652+
defined(WOLFSSL_ESP32_CRYPT) && \
649653
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
654+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
655+
* depending on if HW is active or not. */
650656
if (esp_sha_need_byte_reversal(&sha->ctx))
651657
#endif
652658
{
@@ -722,9 +728,15 @@ int wc_ShaUpdate(wc_Sha* sha, const byte* data, word32 len)
722728
#endif
723729

724730
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
725-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
731+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
732+
defined(CONFIG_IDF_TARGET_ESP8684) || \
733+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
734+
defined(CONFIG_IDF_TARGET_ESP32C6) \
735+
) && \
726736
defined(WOLFSSL_ESP32_CRYPT) && \
727737
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
738+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
739+
* depending on if HW is active or not. */
728740
if (esp_sha_need_byte_reversal(&sha->ctx))
729741
#endif
730742
{
@@ -765,9 +777,15 @@ int wc_ShaFinalRaw(wc_Sha* sha, byte* hash)
765777
}
766778

767779
#ifdef LITTLE_ENDIAN_ORDER
768-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
780+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
781+
defined(CONFIG_IDF_TARGET_ESP8684) || \
782+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
783+
defined(CONFIG_IDF_TARGET_ESP32C6) \
784+
) && \
769785
defined(WOLFSSL_ESP32_CRYPT) && \
770786
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
787+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
788+
* depending on if HW is active or not. */
771789
if (esp_sha_need_byte_reversal(&sha->ctx))
772790
#endif
773791
{
@@ -834,9 +852,15 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash)
834852
#endif
835853

836854
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
837-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
855+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
856+
defined(CONFIG_IDF_TARGET_ESP8684) || \
857+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
858+
defined(CONFIG_IDF_TARGET_ESP32C6) \
859+
) && \
838860
defined(WOLFSSL_ESP32_CRYPT) && \
839861
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
862+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
863+
* depending on if HW is active or not. */
840864
if (esp_sha_need_byte_reversal(&sha->ctx))
841865
#endif
842866
{
@@ -875,9 +899,15 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash)
875899
#endif
876900

877901
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
878-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
902+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
903+
defined(CONFIG_IDF_TARGET_ESP8684) || \
904+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
905+
defined(CONFIG_IDF_TARGET_ESP32C6) \
906+
) && \
879907
defined(WOLFSSL_ESP32_CRYPT) && \
880908
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
909+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
910+
* depending on if HW is active or not. */
881911
if (esp_sha_need_byte_reversal(&sha->ctx))
882912
#endif
883913
{ /* reminder local also points to sha->buffer */
@@ -902,8 +932,12 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash)
902932
#endif
903933

904934

905-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
906-
defined(WOLFSSL_ESP32_CRYPT) && !defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
935+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
936+
defined(CONFIG_IDF_TARGET_ESP8684) || \
937+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
938+
defined(CONFIG_IDF_TARGET_ESP32C6) \
939+
) && \
940+
defined(WOLFSSL_ESP32_CRYPT) && !defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
907941
if (sha->ctx.mode == ESP32_SHA_HW) {
908942
#if defined(WOLFSSL_SUPER_VERBOSE_DEBUG)
909943
{
@@ -938,9 +972,14 @@ if (sha->ctx.mode == ESP32_SHA_HW) {
938972
#endif
939973

940974
#ifdef LITTLE_ENDIAN_ORDER
941-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
942-
defined(WOLFSSL_ESP32_CRYPT) && \
943-
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
975+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
976+
defined(CONFIG_IDF_TARGET_ESP8684) || \
977+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
978+
defined(CONFIG_IDF_TARGET_ESP32C6) \
979+
) && \
980+
defined(WOLFSSL_ESP32_CRYPT) && !defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
981+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
982+
* depending on if HW is active or not. */
944983
if (esp_sha_need_byte_reversal(&sha->ctx))
945984
#endif
946985
{

‎wolfcrypt/src/sha256.c‎

Lines changed: 68 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1073,11 +1073,16 @@ static int InitSha256(wc_Sha256* sha256)
10731073
(defined(HAVE_INTEL_AVX1) || defined(HAVE_INTEL_AVX2))
10741074
if (!IS_INTEL_AVX1(intel_flags) && !IS_INTEL_AVX2(intel_flags))
10751075
#endif
1076-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1077-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1078-
defined(WOLFSSL_ESP32_CRYPT) && \
1076+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1077+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1078+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1079+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1080+
) && \
1081+
defined(WOLFSSL_ESP32_CRYPT) && \
10791082
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
10801083
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1084+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1085+
* depending on if HW is active or not. */
10811086
if (esp_sha_need_byte_reversal(&sha256->ctx))
10821087
#endif
10831088
{
@@ -1179,11 +1184,16 @@ static int InitSha256(wc_Sha256* sha256)
11791184
#endif
11801185

11811186
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
1182-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1183-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1184-
defined(WOLFSSL_ESP32_CRYPT) && \
1187+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1188+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1189+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1190+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1191+
) && \
1192+
defined(WOLFSSL_ESP32_CRYPT) && \
11851193
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
11861194
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1195+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1196+
* depending on if HW is active or not. */
11871197
if (esp_sha_need_byte_reversal(&sha256->ctx))
11881198
#endif
11891199
#if defined(WOLFSSL_X86_64_BUILD) && \
@@ -1297,11 +1307,16 @@ static int InitSha256(wc_Sha256* sha256)
12971307
#endif
12981308

12991309
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
1300-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1301-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1302-
defined(WOLFSSL_ESP32_CRYPT) && \
1310+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1311+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1312+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1313+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1314+
) && \
1315+
defined(WOLFSSL_ESP32_CRYPT) && \
13031316
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
13041317
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1318+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1319+
* depending on if HW is active or not. */
13051320
if (esp_sha_need_byte_reversal(&sha256->ctx))
13061321
#endif
13071322
#if defined(WOLFSSL_X86_64_BUILD) && defined(USE_INTEL_SPEEDUP) && \
@@ -1350,11 +1365,16 @@ static int InitSha256(wc_Sha256* sha256)
13501365

13511366
/* store lengths */
13521367
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
1353-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1354-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1355-
defined(WOLFSSL_ESP32_CRYPT) && \
1368+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1369+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1370+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1371+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1372+
) && \
1373+
defined(WOLFSSL_ESP32_CRYPT) && \
13561374
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
13571375
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1376+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1377+
* depending on if HW is active or not. */
13581378
if (esp_sha_need_byte_reversal(&sha256->ctx))
13591379
#endif
13601380
#if defined(WOLFSSL_X86_64_BUILD) && defined(USE_INTEL_SPEEDUP) && \
@@ -1373,11 +1393,16 @@ static int InitSha256(wc_Sha256* sha256)
13731393

13741394
/* Only the ESP32-C3 with HW enabled may need pad size byte order reversal
13751395
* depending on HW or SW mode */
1376-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1377-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1378-
defined(WOLFSSL_ESP32_CRYPT) && \
1396+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1397+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1398+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1399+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1400+
) && \
1401+
defined(WOLFSSL_ESP32_CRYPT) && \
13791402
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
13801403
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1404+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1405+
* depending on if HW is active or not. */
13811406
if (sha256->ctx.mode == ESP32_SHA_HW) {
13821407
#if defined(WOLFSSL_SUPER_VERBOSE_DEBUG)
13831408
ESP_LOGV(TAG, "Start: Reverse PAD SIZE Endianness.");
@@ -1442,11 +1467,16 @@ static int InitSha256(wc_Sha256* sha256)
14421467
}
14431468

14441469
#ifdef LITTLE_ENDIAN_ORDER
1445-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1446-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1447-
defined(WOLFSSL_ESP32_CRYPT) && \
1470+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1471+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1472+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1473+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1474+
) && \
1475+
defined(WOLFSSL_ESP32_CRYPT) && \
14481476
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
14491477
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1478+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1479+
* depending on if HW is active or not. */
14501480
if (esp_sha_need_byte_reversal(&sha256->ctx))
14511481
#endif
14521482
{
@@ -1497,10 +1527,16 @@ static int InitSha256(wc_Sha256* sha256)
14971527
}
14981528

14991529
#if defined(LITTLE_ENDIAN_ORDER)
1500-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1501-
defined(WOLFSSL_ESP32_CRYPT) && \
1530+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1531+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1532+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1533+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1534+
) && \
1535+
defined(WOLFSSL_ESP32_CRYPT) && \
15021536
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
15031537
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
1538+
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
1539+
* depending on if HW is active or not. */
15041540
if (esp_sha_need_byte_reversal(&sha256->ctx))
15051541
#endif
15061542
{
@@ -1792,23 +1828,27 @@ static int InitSha256(wc_Sha256* sha256)
17921828
}
17931829
#endif /* WOLFSSL_ASYNC_CRYPT */
17941830

1795-
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
1796-
(!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
1797-
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224))
1831+
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
1832+
( !defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
1833+
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224) )
17981834

1799-
/* nothing enabled here for C3 success */
1835+
/* nothing enabled here for RISC-V C2/C3/C6 success */
18001836
#endif
18011837

18021838
ret = Sha256Final((wc_Sha256*)sha224);
18031839
if (ret != 0)
18041840
return ret;
18051841

18061842
#if defined(LITTLE_ENDIAN_ORDER)
1807-
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
1808-
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
1843+
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
1844+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1845+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
1846+
defined(CONFIG_IDF_TARGET_ESP32C6) \
1847+
) && \
18091848
defined(WOLFSSL_ESP32_CRYPT) && \
1810-
(!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
1811-
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224))
1849+
(!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
1850+
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224) \
1851+
)
18121852
if (esp_sha_need_byte_reversal(&sha224->ctx))
18131853
#endif
18141854
{

‎wolfcrypt/src/sha512.c‎

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1613,20 +1613,23 @@ int wc_Sha512Copy(wc_Sha512* src, wc_Sha512* dst)
16131613
if (ret == 0) {
16141614
ret = esp_sha512_ctx_copy(src, dst);
16151615
}
1616-
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
1616+
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \
1617+
defined(CONFIG_IDF_TARGET_ESP8684) || \
1618+
defined(CONFIG_IDF_TARGET_ESP32C3) || \
16171619
defined(CONFIG_IDF_TARGET_ESP32C6)
16181620
ESP_LOGV(TAG, "No SHA-512 HW on the ESP32-C3");
1621+
16191622
#elif defined(CONFIG_IDF_TARGET_ESP32S2) || \
16201623
defined(CONFIG_IDF_TARGET_ESP32S3)
1621-
if (ret == 0) {
1622-
ret = esp_sha512_ctx_copy(src, dst);
1623-
}
1624+
if (ret == 0) {
1625+
ret = esp_sha512_ctx_copy(src, dst);
1626+
}
16241627
#else
16251628
ESP_LOGW(TAG, "No SHA384 HW or not yet implemented for %s",
16261629
CONFIG_IDF_TARGET);
16271630
#endif
16281631

1629-
#endif
1632+
#endif /* WOLFSSL_USE_ESP32_CRYPT_HASH_HW */
16301633

16311634
#ifdef WOLFSSL_HASH_FLAGS
16321635
dst->flags |= WC_HASH_FLAG_ISCOPY;
@@ -1893,7 +1896,9 @@ int wc_Sha384Copy(wc_Sha384* src, wc_Sha384* dst)
18931896
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW)
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#if defined(CONFIG_IDF_TARGET_ESP32)
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esp_sha384_ctx_copy(src, dst);
1896-
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
1899+
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \
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defined(CONFIG_IDF_TARGET_ESP8684) || \
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defined(CONFIG_IDF_TARGET_ESP32C3) || \
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defined(CONFIG_IDF_TARGET_ESP32C6)
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ESP_LOGV(TAG, "No SHA-384 HW on the ESP32-C3");
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#elif defined(CONFIG_IDF_TARGET_ESP32S2) || \

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