fwk: sunflower: update pl setting to improve DC balance mode performance

To improve DC balance mode performance, follow ERS Sunflower
Mainboard ERS_X8.pdf to update pl setting.

BRANCH=sunflower
BUG=https://app.clickup.com/t/86erzedgq
TEST=Check the setting log on ec console

Signed-off-by: LeilaCY-Lin <LeilaCY_Lin@compal.com>

Author: LeilaCY-Lin

zephyr/program/framework/sunflower/src/cpu_power.c

@@ -102,19 +102,19 @@ void update_soc_power_limit(bool force_update, bool force_no_adapter)
 		reduce_typec_1_5A();
 	} else if (!battery_is_present() && active_power >= 60) {
 		/*Standalone mode AC only and AC >= 60W*/
-		pl1_watt = 15;
+		pl1_watt = 20;
 		pl2_watt = 40;
 		pl4_watt = ((active_power * 95) / 100);
 		psyspl2_watt = ((active_power * 95) / 100);
 	} else if (battery_percent >= 30 && active_power >= 55) {
 		/* Battery percentage >= 30% and ADP >= 55W */
-		pl1_watt = 15;
+		pl1_watt = 20;
 		pl2_watt = 40;
 		pl4_watt = 87;
 		psyspl2_watt = ((active_power * 95) / 100) + ((batt_rating * 70) / 100);
 	} else if (battery_percent < 30 && active_power >= 55) {
 		/* Battery percentage < 30% and ADP >= 55W */
-		pl1_watt = 15;
+		pl1_watt = 20;
 		pl2_watt = MIN(((active_power * 90) / 100) - ROP, 40);
 		pl4_watt = MIN(((active_power * 90) / 100) + ((batt_rating * 13) / 10), 87);
 		psyspl2_watt = ((active_power * 95) / 100);