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VladimirUmekVladimirUmek
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- Documentation updated (osMemoryPools, release notes)
- Removed unused conditions from pack description - Updated version
1 parent f492896 commit b6c3e65

4 files changed

Lines changed: 24 additions & 90 deletions

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‎ARM.CMSIS-FreeRTOS.pdsc‎

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@@ -8,19 +8,13 @@
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<license>License/license.txt</license>
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<releases>
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<release version="10.2.1-dev3">
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- Reworked component conditions
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</release>
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<release version="10.2.1-dev2">
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- Moved device and environment specifics into separate header
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- Added implementation of the osMemoryPool functions using FreeRTOS
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- Removed Cortex-A example (will be available in separate pack)
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</release>
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<release version="10.2.1-dev1">
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- Updated to FreeRTOS 10.2.1
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</release>
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<release version="10.2.1-dev0">
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- Corrected osThreadGetStackSpace return value (bytes instead of words)
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<release version="10.3.0-rc0">
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FreeRTOS 10.3.0
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Maintenance for CMSIS 5.4.0:
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- Added osMemoryPool functions using FreeRTOS
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- Corrected osEventFlagsWait flag comparison when using osFlagsWaitAll
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- Corrected osThreadGetStackSpace return value (bytes instead of words)
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- Removed Cortex-A examples (available in device specific packs)
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</release>
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<release version="10.2.0" date="2019-04-12">
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FreeRTOS 10.2.0
@@ -80,19 +74,10 @@
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<require Tcompiler="IAR"/>
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</condition>
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<condition id="ARMCC GCC">
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<accept condition="ARMCC"/>
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<accept condition="GCC"/>
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</condition>
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<condition id="ARMCC6 GCC">
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<accept condition="ARMCC6"/>
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<accept condition="GCC"/>
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</condition>
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<condition id="ARMCC GCC IAR">
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<accept condition="ARMCC"/>
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<accept condition="GCC"/>
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<accept condition="IAR"/>
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</condition>
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<condition id="ARMCC6 GCC IAR">
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<accept condition="ARMCC6"/>
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<accept condition="GCC"/>
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<require condition="ARMCC"/>
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</condition>
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<condition id="CA9_DP_ARMCC">
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<description>Cortex-A9 processor based device for the ARM Compiler 5</description>
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<require condition="CA9_DP"/>
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<require condition="ARMCC"/>
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</condition>
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<!-- ARMCC6 compiler -->
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<condition id="CM0_ARMCC6">
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<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler 6</description>
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<require condition="CM23"/>
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<require condition="ARMCC6"/>
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</condition>
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<condition id="CM23_NoTZ_ARMCC6">
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<description>Cortex-M23 processor based device without TrustZone for the ARM Compiler 6</description>
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<require condition="CM23_NoTZ"/>
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<require condition="ARMCC6"/>
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</condition>
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<condition id="CM23_TZ_ARMCC6">
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<description>Cortex-M23 processor based device with TrustZone for the ARM Compiler 6</description>
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<require condition="CM23_TZ"/>
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<require condition="CM33"/>
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<require condition="ARMCC6"/>
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</condition>
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<condition id="CM33_NoTZ_ARMCC6">
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<description>Cortex-M33 processor based device without TrustZone for the ARM Compiler 6</description>
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<require condition="CM33_NoTZ"/>
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<require condition="ARMCC6"/>
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</condition>
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<condition id="CM33_TZ_ARMCC6">
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<description>Cortex-M33 processor based device with TrustZone for the ARM Compiler 6</description>
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<require condition="CM33_TZ"/>
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<require condition="ARMCC6"/>
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</condition>
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<condition id="CA9_DP_ARMCC6">
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<description>Cortex-A9 processor based device for the ARM Compiler 6</description>
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<require condition="CA9_DP"/>
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<require condition="ARMCC6"/>
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</condition>
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<!-- GCC compiler -->
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<condition id="CM0_GCC">
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<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
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<require condition="CM23"/>
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<require condition="GCC"/>
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</condition>
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<condition id="CM23_NoTZ_GCC">
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<description>Cortex-M23 processor based device without TrustZone for the GCC Compiler</description>
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<require condition="CM23_NoTZ"/>
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<require condition="GCC"/>
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</condition>
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<condition id="CM23_TZ_GCC">
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<description>Cortex-M23 processor based device with TrustZone for the GCC Compiler</description>
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<require condition="CM23_TZ"/>
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<require condition="CM33"/>
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<require condition="GCC"/>
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</condition>
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<condition id="CM33_NoTZ_GCC">
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<description>Cortex-M33 processor based device without TrustZone for the GCC Compiler</description>
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<require condition="CM33_NoTZ"/>
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<require condition="GCC"/>
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</condition>
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<condition id="CM33_TZ_GCC">
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<description>Cortex-M33 processor based device with TrustZone for the GCC Compiler</description>
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<require condition="CM33_TZ"/>
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<require condition="GCC"/>
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</condition>
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<condition id="CA9_DP_GCC">
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<description>Cortex-A9 processor based device for the GCC Compiler</description>
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<require condition="CA9_DP"/>
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<require condition="GCC"/>
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</condition>
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<!-- IAR compiler -->
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<condition id="CM0_IAR">
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<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
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<require condition="CM23"/>
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<require condition="IAR"/>
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</condition>
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<condition id="CM23_NoTZ_IAR">
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<description>Cortex-M23 processor based device without TrustZone for the IAR Compiler</description>
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<require condition="CM23_NoTZ"/>
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<require condition="IAR"/>
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</condition>
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<condition id="CM23_TZ_IAR">
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<description>Cortex-M23 processor based device with TrustZone for the IAR Compiler</description>
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<require condition="CM23_TZ"/>
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<require condition="CM33"/>
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<require condition="IAR"/>
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</condition>
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<condition id="CM33_NoTZ_IAR">
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<description>Cortex-M33 processor based device without TrustZone for the IAR Compiler</description>
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<require condition="CM33_NoTZ"/>
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<require condition="IAR"/>
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</condition>
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<condition id="CM33_TZ_IAR">
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<description>Cortex-M33 processor based device with TrustZone for the IAR Compiler</description>
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<require condition="CM33_TZ"/>
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<require condition="IAR"/>
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</condition>
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<condition id="CA9_DP_IAR">
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<description>Cortex-A9 processor based device for the IAR Compiler</description>
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<require condition="CA9_DP"/>
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<require condition="IAR"/>
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</condition>
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<!-- FreeRTOS ports for the Arm Cortex core -->
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<condition id="FreeRTOS Port Cortex-A">
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<description>Requirements for FreeRTOS port for Cortex-A</description>

‎CMSIS/RTOS2/FreeRTOS/FreeRTOS.scvd‎

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<?xml version="1.0" encoding="utf-8"?>
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<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
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<component name="CMSIS-FreeRTOS" version="10.2.1"/>
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<component name="CMSIS-FreeRTOS" version="10.3.0"/>
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<typedefs>
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<typedef name="ListItem_t" size="20" info="List object definition (list.h)">

‎DoxyGen/General/general.dxy‎

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@@ -38,7 +38,7 @@ PROJECT_NAME = CMSIS-FreeRTOS
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# could be handy for archiving the generated documentation or if some version
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# control system is used.
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PROJECT_NUMBER = "Version 10.2.0"
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PROJECT_NUMBER = "Version 10.3.0"
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# Using the PROJECT_BRIEF tag one can provide an optional one line description
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# for a project that appears at the top of each page and should give viewer a

‎DoxyGen/General/src/cmsis_freertos.txt‎

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@@ -57,11 +57,15 @@ File/Directory |Content
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<table class="cmtable" summary="Revision History">
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<tr>
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<td>10.2.1</td>
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<td>10.3.0</td>
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<td>
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<p><b>FreeRTOS V10.2.1</b></p>
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<p>Maintenance release for CMSIS 5.6.0:
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<ul>
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<li>Updated to FreeRTOS V10.2.1</li>
65+
<li>Added osMemoryPool functions using FreeRTOS
66+
<li>Corrected osEventFlagsWait flag comparison when using osFlagsWaitAll</li>
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<li>Corrected osThreadGetStackSpace return value (bytes instead of words)</li>
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<li>Removed Cortex-A examples (available in device specific packs)
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</ul>
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</td>
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</tr>
@@ -410,7 +414,6 @@ The following list briefly describes the limitations and unsupported features of
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- Robust mutex objects are not supported (\c osMutexNew returns NULL when \c osMutexRobust attribute is specified).
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- \c osMutexGetName is not implemented and always returns NULL.
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- \c osSemaphoreGetName is not implemented and always returns NULL.
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- Memory Pool functions are not implemented and will always return with error.
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- \c osMessageQueueGetName is not implemented and always returns NULL.
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- \c osMessageQueuePut and \c osMessageQueueGet always ignore message priority.
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@@ -547,15 +550,15 @@ Robust mutex objects are not supported (osMutexNew returns NULL when osMutexRobu
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<a href="http://arm-software.github.io/CMSIS_5/RTOS2/html/group__CMSIS__RTOS__PoolMgmt.html">Memory Pool</a>
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-----------
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Memory Pool functions are not implemented and will always return with error.
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- \b osMemoryPoolAlloc: \token{not implemented}
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- \b osMemoryPoolDelete: \token{not implemented}
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- \b osMemoryPoolFree: \token{not implemented}
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- \b osMemoryPoolGetBlockSize: \token{not implemented}
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- \b osMemoryPoolGetCapacity: \token{not implemented}
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- \b osMemoryPoolGetCount: \token{not implemented}
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- \b osMemoryPoolGetName: \token{not implemented}
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- \b osMemoryPoolGetSpace: \token{not implemented}
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- \b osMemoryPoolNew: \token{not implemented}
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- \b osMemoryPoolAlloc: supported
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- \b osMemoryPoolDelete: supported
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- \b osMemoryPoolFree: supported
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- \b osMemoryPoolGetBlockSize: supported
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- \b osMemoryPoolGetCapacity: supported
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- \b osMemoryPoolGetCount: supported
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- \b osMemoryPoolGetName: supported
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- \b osMemoryPoolGetSpace: supported
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- \b osMemoryPoolNew: supported
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<a href="http://arm-software.github.io/CMSIS_5/RTOS2/html/group__CMSIS__RTOS__Message.html">Message Queue</a>
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-------------

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